MUMBAI, India, May 1 -- Intellectual Property India has published a patent application (202641051569 A) filed by Vellore Institute Of Technology, Vellore, Tamil Nadu, on April 22, for 'a computer-implemented system for deterministic multi-layer verification of machine-generated textual data.'
Inventor(s) include N. Yuvaraj; Jayesh Pani; Akshat Agrawal; and K. R. Sri Preethaa.
The application for the patent was published on May 1, under issue no. 18/2026.
According to the abstract released by the Intellectual Property India: "The present invention relates to a computer-implemented system and method for deterministic multi-layer verification of machine-generated textual data. The system comprises an input module (101) configured to receive an LLM answer (102) and evidence documents (103), a preprocessing module (105), a decomposition module (402) for extracting atomic claims (403, 404, 405), a retrieval module (108) for identifying relevant evidence (109), and a multi-layer verification engine (112). The verification engine comprises an arithmetic guard layer (201) configured for numerical extraction and arithmetic comparison (202), a reflex engine (206) for classification (208), and a cognitive core (212) for advanced analysis (213), operating in a sequential escalation manner (211). Thesystem further comprises an aggregation module(115) and an output module (117) for generating verification results (114) and reports (118). The invention enables improved factual accuracy and privacy-preserving verification."
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