MUMBAI, India, Feb. 6 -- Intellectual Property India has published a patent application (202511133281 A) filed by Manipal University, Jaipur, Rajasthan, on Dec. 30, 2025, for 'a method for router-level fault-tolerant communication in network-on-chip systems.'

Inventor(s) include Dr. Manoj Kumar Bohra.

The application for the patent was published on Feb. 6, under issue no. 06/2026.

According to the abstract released by the Intellectual Property India: "The present invention relates to a method for router-level fault-tolerant communication in network-on-chip systems. Router failure happens when router parts stop working. Parts like input ports, channels, or control logic can fail. Failure can be permanent or temporary. Permanent failure comes from wear and tear. Temporary failure comes from soft errors like bit flips. When a router fails, packets cannot move. This can stop communication and cause deadlock. In a 2D mesh, routers are in a grid. Each router connects to four sides: North, South, East, West. It also connects to one local core. If router at (2,2) fails in a 4 4 mesh, packets cannot pass through it. This breaks the path. The present invention method combines adaptive routing and bypasses paths. The method comprises: continuously monitoring operational states of router components to identify router failures; detecting a failure based on fault indicators including packet forwarding blockage or control logic malfunction; and classifying the failure as temporary or permanent. Upon detecting a faulty router, routing decisions are dynamically modified to avoid the faulty router while maintaining communication between source and destination nodes. Alternative paths are selected using adaptive routing rules, and deadlock is avoided by enforcing routing constraints. Logical bypass paths are established to skip the faulty router, and the network is dynamically reconfigured by updating routing control information. Original routing paths are restored when temporary faults are resolved."

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