MUMBAI, India, July 11 -- Intellectual Property India has published a patent application (202511061951 A) filed by Noida Institute Of Engineering & Technology, Greater Noida, Uttar Pradesh, on June 28, for 'a smart memory optimization device for temporary data caching.'
Inventor(s) include Amar Pal Yadav.
The application for the patent was published on July 11, under issue no. 28/2025.
According to the abstract released by the Intellectual Property India: "The present invention discloses a smart memory optimization device (100) for temporary data caching includes a control unit (102), cache memory (101), optimization logic (103), and memory interface (104). It intelligently manages data caching using predictive algorithms based on access patterns and system parameters. The device dynamically adapts caching policies to improve memory efficiency, reduce latency, and enhance system responsiveness in real-time computing applications. It supports write-through and write-back modes and integrates seamlessly into embedded, portable, and distributed systems."
Disclaimer: Curated by HT Syndication.
