MUMBAI, India, May 1 -- Intellectual Property India has published a patent application (202641050780 A) filed by J. B. Institute Of Engineering And Technology, Hyderabad, Telangana, on April 21, for 'an energy-adaptive embedded processor architecture for deterministic real-time applications with dynamic power optimization.'
Inventor(s) include Mrs. Akula Jyothi; Mrs. Shilpa K; Ms. G Surekha; Dr. B. Shravan Kumar; Mr. N. Ramesh Babu; and Mr. Bijaya Kumar Muni.
The application for the patent was published on May 1, under issue no. 18/2026.
According to the abstract released by the Intellectual Property India: "The present invention discloses an energy-adaptive embedded processor architecture designed for real-time applications requiring deterministic execution and optimized power consumption. The architecture comprises a processing core, an adaptive control unit, a workload prediction module, and a power modulation engine configured to dynamically regulate energy usage based on task criticality and execution requirements. The workload prediction module analyzes historical and real-time data to forecast computational demand, enabling the adaptive control unit to adjust operational parameters including voltage, frequency, and resource allocation. The power modulation engine performs fine-grained optimization through instruction-level gating, selective pipeline activation, and memory access control. A deterministic scheduler ensures timely execution of critical tasks while non-critical tasks operate under reduced energy modes. The architecture achieves improved energy efficiency without compromising timing constraints, making it suitable for embedded systems in automotive, industrial, and medical applications."
Disclaimer: Curated by HT Syndication.
