MUMBAI, India, July 25 -- Intellectual Property India has published a patent application (202547067917 A) filed by Qualcomm Incorporated, San Diego, on July 16, for 'integrated device comprising stacked inductors with low or no mutual inductance.'
Inventor(s) include Yen, Hsiao-Tsung; Hua, Xingyi; and Kim, Jeongil Jay.
The application for the patent was published on July 25, under issue no. 30/2025.
According to the abstract released by the Intellectual Property India: "An integrated device comprising a die substrate, a die interconnection portion coupled to the die substrate, and a stacked inductor that includes a first figure 8-shaped inductor and a second figure 8-shaped inductor. The stacked inductor may include a first spiral comprising a first origin and a first tail, a second spiral comprising a second origin and a second tail, a third spiral comprising a third origin and a third tail and a fourth spiral comprising a fourth origin and a fourth tail. The first spiral, the second spiral, the third spiral and the fourth spiral may form the first figure 8-shaped inductor and the second figure 8-shaped inductor. The stacked inductor may be located in the die interconnection."
The patent application was internationally filed on Mar. 07, 2024, under International application No.PCT/US2024/018914.
Disclaimer: Curated by HT Syndication.
