MUMBAI, India, Aug. 22 -- Intellectual Property India has published a patent application (202421012546 A) filed by Tata Consultancy Services Limited, Maharashtra, on Feb. 21, 2024, for 'method and system for depth reduction of quantum circuits.'
Inventor(s) include Babu, Akashnarayanan; Koul, Neerja; Deep, Akshita; and Poojary, Sudhakara Deva.
The application for the patent was published on Aug. 22, under issue no. 34/2025.
According to the abstract released by the Intellectual Property India: "Quantum computing is currently in the Noisy Intermediate-Scale Quantum(NISQ) era wherein quantum executions suffer from the impact of noise. The noise introduced in a quantum execution scales with the depth of a quantum circuit. Hence, the impact of noise could be pronounced with increase in complexity of tasks being executed, thus adversely affecting quality of results. The approach disclosed herein provide method and system for depth reduction of quantum circuits. The system, while processing a quantum circuit, identifies all D gates in the quantum circuit, and extracts associated preceding gate and succeeding gate. Further, if a preceding gate - succeeding gate pair satisfies a set of predefined conditions, then the succeeding gate is removed and effect of the succeeding gate is included in the preceding gate, for all preceding gate - succeeding gate pairs, for all of n qubits, thus achieving depth reduction of the quantum circuit."
Disclaimer: Curated by HT Syndication.
