MUMBAI, India, Nov. 14 -- Intellectual Property India has published a patent application (202441037422 A) filed by Samsung Electronics Co. Ltd., Gyeonggi, Republic of Korea, on May 13, 2024, for 'methods and systems for detecting functional defects at designing stage of a design code.'
Inventor(s) include Maruthi Srinivas Narasimhan; and Satyam Saxena.
The application for the patent was published on Nov. 14, under issue no. 46/2025.
According to the abstract released by the Intellectual Property India: "A method for detecting one or more functional defects in a design code includes generating, using processing circuitry, Hardware Verification Language (HVL) code representing semantic behaviour of design code, the generating including identifying one or more expressions associated with the one or more functional defects in the HVL code, identifying, using the processing circuitry, one or more patterns associated with the one or more functional defects in one or more second design code written in the first language, mapping, using the processing circuitry, the one or more expressions of the HVL code with the one or more identified patterns, forming, using the processing circuitry, a bind of the one or more expressions with the one or more patterns based on the mapping, and evaluating, using the processing circuitry, the bind to identify the one or more functional defects in the design code."
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