MUMBAI, India, Jan. 23 -- Intellectual Property India has published a patent application (202541100986 A) filed by Indian Space Research Organization, Bangalore, Karnataka, on Oct. 17, 2025, for 'novel test structure for module wise testing of embedded tmr memory.'
Inventor(s) include Padmapriya K; Rahul Anilkumar; and Debjyoti Mallik.
The application for the patent was published on Jan. 23, under issue no. 04/2026.
According to the abstract released by the Intellectual Property India: "The present innovation relates to a novel test structure for module wise testing of TMR embedded memories in a System-on-Chip, in the absence of Memory BIST. The innovation is capable of achieving 100% defect coverage of TMR implemented embedded memories. The proposed novel test structures are capable of testing individual modules of embedded Triple Modular Redundant (TMR) memory cores in a SoC for spacecraft avionics. Methods adopted in the implementation improves device yield and reliability. Tests on device fabricated with proposed structure guaranteed defect free, reliable devices for spacecraft applications."
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