MUMBAI, India, May 1 -- Intellectual Property India has published a patent application (202641050978 A) filed by Sr University, Warangal, Telangana, on April 21, for 'system and method for noise-adaptive topological mapping in variational quantum circuit architectures.'
Inventor(s) include Dr. Mohammed Ali Shaik.
The application for the patent was published on May 1, under issue no. 18/2026.
According to the abstract released by the Intellectual Property India: "The invention offers a device and approach to noise-adaptive topological mapping in quantum circuit architecture variational schemes to improve the execution fidelity on quantum computers of the NISQ era. The system itself consists of a noise characterization engine to acquire calibration data in real-time, a topological analyzer to produce weighted hardware graphs and a mapping orchestrator to optimize the placement of logical qubits on physical hardware dynamically. The invention steers quantum operations to avoid high-error qubits and couplers by noise-awarely compiling and routing circuitry. The system also enables the real-time re- mapping of the system as the variational algorithms, i.e. VQE and QAOA, run through the iterative loops to consider hardware noise drift. This adaptative strategy reduces the error of the circuit accumulation, enhances the convergence of the hybrid quantum-classical optimization, and maximizes the chances of success of the complex quantum computation on various hardware platforms."
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