MUMBAI, India, Sept. 12 -- Intellectual Property India has published a patent application (202517081295 A) filed by Arm Limited, Cambridge, U.K., on Aug. 27, for 'tag protecting instruction.'
Inventor(s) include Barnes, Graeme Peter.
The application for the patent was published on Sept. 12, under issue no. 37/2025.
According to the abstract released by the Intellectual Property India: "Access control circuitry (15), responsive to a memory access request, compares a tag value determined based on a tag portion (40) of an address pointer (42) with an allocation tag (32) associated with the memory location identified by a memory address determined from the address pointer. In response to the comparison indicating a given result, a tag error response is performed. Processing circuitry (4), executing a tag protecting instruction, detects whether an operation involves an attempt to set a bit in an identified portion (74) of an output value to a value other than that in a corresponding bit in an input operand. The processing circuitry sets, when it detects said attempt, a given portion of the output value to an error-indicating value. The identified portion is a portion of the output value which would be used as the tag portion if the output operand was used as the address pointer for a memory access instruction."
The patent application was internationally filed on Jan. 08, 2024, under International application No.PCT/GB2024/050029.
Disclaimer: Curated by HT Syndication.
