MUMBAI, India, July 24 -- Intellectual Property India has published a patent application (202611059890 A) filed by Vivekananda Institute Of Professional Studies - Technical Campus on May 11, 2026, for A Fpga Integrated Circuit Based Real-Time Multi-Sensor Disaster Early Warning System.
Inventors include Ms. Mamta Sharma; and Dr. Anand Kumar Singh.
The application for the patent was published on July 17, 2026, under issue no. 29/2026.
Abstract: The invention belongs to the technical field of on-chip disaster early warning systems and provides an integrated ASIC featuring a sensor interface module with multiple analog front-end channels incorporating low-noise amplifiers, anti-aliasing filters, programmable gain stages and time-division multiplexers for interfacing seismic/vibration, rainfall, tilt, temperature, humidity and air- quality transducers. Conditioned signals are digitized by an analog-to-digital converter controller and processed by a signal processing by a signal processing unit incorporating filtering and frequency analysis to extract features. A threshold comparator bank generates anomaly flags, which are evaluated by multi-sensor correlator logic and sequenced by a finite-state machine-based alert logic controller to drive alert drivers and a communication interface. A power management unit supports dual power modes under control of the alert logic controller.
Disclaimer: Curated by HT Syndication.
