MUMBAI, India, July 24 -- Intellectual Property India has published a patent application (202611065586 A) filed by Noida Institute Of Engineering & Technology on May 25, 2026, for A Low-Power Digital Demodulation System For Receivers.
Inventors include Sukanya Singh; and Dr. Rajan Singh.
The application for the patent was published on July 17, 2026, under issue no. 29/2026.
Abstract: A low-power digital demodulation system for receivers includes a sampled-signal input interface, signal conditioning module, quality metric generator, adaptive synchronization module, configurable symbol estimator, low-power demapper, mode control unit, state retention register bank, and output interface. The system evaluates reception quality and selectively controls clock activity, arithmetic precision, filtering resources, loop update density, and demapping effort. Retained synchronization states support reduced activity without complete reacquisition. The arrangement provides reliable demodulation with decreased switching activity for portable and embedded receiver applications.
Disclaimer: Curated by HT Syndication.
