MUMBAI, India, July 24 -- Intellectual Property India has published a patent application (202647086474 A) filed by Xilinx, Inc. on July 15, 2026, for An Area And Power Efficient Clock Data Recovery (cdr) And Adaptation Implementation For Dense Wavelength-Division Multiplexing (dwdm) Optical Links.
Inventors include Poon, Chi Fung; Chou, Shih-Wei; Raj, Mayank; Upadhyaya, Parag Number; Ngo, Huy; and Lin, Weisheng Winson.
The application for the patent was published on July 17, 2026, under issue no. 29/2026.
Abstract: Embodiments herein describe techniques for area and power efficient clock data recovery (CDR) and adaptation implementations for dense wavelength-division multiplexing (DWDM) optical links and other types of links. One example is a system that includes a plurality of receiver circuits that sample signals based on respective receiver clocks, where the receiver circuits include a reference receiver circuit and remaining receiver circuits, and where the receiver clock of the reference receiver circuit comprises a reference clock. The system further includes a clock and data recovery (CDR) circuit that controls a phase of the reference clock based on outputs of the reference receiver circuit, and time-multiplexed de-skew circuitry configured to determine time-multiplexed phase offsets for the remaining receiver circuits based on time-multiplexed outputs of the remaining receiver circuits, where the remaining receiver circuits phase-shift the reference clock based on the respective time- multiplexed phase offsets to provide the respective receiver clocks.
Disclaimer: Curated by HT Syndication.
