MUMBAI, India, Aug. 12 -- Intellectual Property India has published a patent application (202611076701 A) filed by Noida Institute Of Engineering & Technology on June 20, 2026, for An Automated Memory Error Detection And Correction Device.
Inventors include Anuradha Singh; and Rashmi Bhardwaj.
The application for the patent was published on August 07, 2026, under issue no. 32/2026.
Abstract: An automated memory error detection and correction device is disclosed for supervising memory access in electronic systems. The device evaluates stored data against associated integrity information, determines whether an error is correctable, supplies corrected data when recovery is possible, and records diagnostic details for later assessment. The device distinguishes isolated disturbances from repeated fault behaviour using address related history and configurable thresholds. The arrangement supports different memory formats and provides host readable status information, thereby improving reliability without requiring continuous software based memory testing.
Disclaimer: Curated by HT Syndication.
