MUMBAI, India, Aug. 17 -- Intellectual Property India has published a patent application (202641095621 A) filed by Vel Tech Rangarajan Dr. Sagunthala R&d Institute Of Science And Technology on August 07, 2026, for Auxiliary Bootstrap Energy Sustainment Architecture For High-Duty Cycle Gate Drivers.
Inventors include Santanu Sharma; and Subhankar Chakraborty.
The application for the patent was published on August 14, 2026, under issue no. 33/2026.
Abstract: Abstract Auxiliary Bootstrap Energy Sustainment Architecture for High-Duty Cycle Gate Drivers The present invention relates to an Auxiliary Bootstrap Energy Sustainment Architecture (ABESA) for high-side semiconductor gate driver circuits. The architecture dynamically supplements the energy available from a conventional bootstrap gate drive during prolonged high-duty-cycle operation using an independently controlled auxiliary energy sustainment circuit including an auxiliary energy storage element. The auxiliary circuit periodically maintains stored electrical energy and selectively supplements the bootstrap gate drive whenever the bootstrap capacitor alone becomes incapable of providing adequate gate-to-source or gate-to-emitter voltage for reliable switching. The disclosed architecture prevents the high-side semiconductor switching device from operating within its linear region, reduces propagation delay and enhances thermal performance without requiring isolated floating power supplies or conventional charge-pump circuits. The architecture is applicable to MOSFETs, IGBTs, silicon carbide devices, gallium nitride devices, and equivalent semiconductor switching devices employed in motor drives, converters, inverters, renewable energy systems, electric vehicles, and industrial power electronic applications.
Disclaimer: Curated by HT Syndication.
