MUMBAI, India, July 24 -- Intellectual Property India has published a patent application (202611064992 A) filed by Noida Institute Of Engineering And Technology Niet on May 22, 2026, for Decomposition-Based Neural Network Compression System With Integrated Architecture Search For Microcontroller Deployment.
Inventors include Biswajit Das; and Dr. Ankur Kumar.
The application for the patent was published on July 17, 2026, under issue no. 29/2026.
Abstract: A neural network compression and deployment system generates ultra-compact convolutional neural network models for microcontroller and neural processing unit deployment. The system comprises a CompressNAS optimization module (100) applying Tucker decomposition through a Tucker decomposition module (103) to each convolutional layer of a residual network backbone (101), replacing each layer with factorized one-by-one, three-by-three, and one-by-one convolutions. A mean squared error based accuracy estimator (104) evaluates decomposition proposals through reconstruction error computation. An integer linear programming solver (102) determines optimal ranks under flash memory constraints. A RAM-efficient projection module (107) reduces runtime memory by modifying stem block channel configuration. A detection framework (200) integrates the compressed backbone (106) with channel projection modules (201), a multi-scale feature aggregation neck (202), and an anchor-free detection head (203). A differential learning rate scheduler (204) preserves pretrained backbone features during training while ensuring quantization compatibility and predictable latency on embedded hardware.
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