MUMBAI, India, Oct. 26 -- Intellectual Property India has published a patent application (202647123120 A) filed by Qualcomm Incorporated on October 14, 2026, for Digit Al-To-Analog Converter (dac) Clock Spur Reduction For Multiple-Input Multiple-Output (mimo) Applications.
Inventors include Weil, Andrew; and Mehdizad Taleie, Shahin.
The application for the patent was published on October 23, 2026, under issue no. 43/2026.
Abstract: Certain aspects of the present disclosure provide techniques and apparatus for signal transmission. An example apparatus generally includes: a first transmission chain including a first clock generator and a first digital-to-analog converter (DAC), an output of the first clock generator being coupled to a clock input of the first DAC, wherein the first transmission chain further includes a first digital data path coupled to an input of the first DAC; a second transmission chain including a second clock generator and a second DAC, an output of the second clock generator being coupled to a clock input of the second DAC, wherein the second transmission chain further includes a second digital data path coupled to an input of the second DAC; and a controller configured to set a first data phase associated with the first digital data path based on a first clock phase associated with the first clock generator.
Disclaimer: Curated by HT Syndication.
