MUMBAI, India, June 22 -- Intellectual Property India has published a patent application (202631023878 A) filed by Indian Institute Of Technology Kharagpur on February 27, 2026, for Hardware-Efficient Recursive Inversion System And Method For Diagonal Dominant Matrices..
Inventors include Ishita Biswas; Sayantika Bera; Gargi Roy; Dr. Amit Kumar Dutta; and Prof. Indrajit Chakrabarti.
The application for the patent was published on June 12, 2026, under issue no. 24/2026.
Abstract: ABSTRACT Title: HARDWARE-EFFICIENT RECURSIVE INVERSION SYSTEM AND METHOD FOR DIAGONAL DOMINANT MATRICES. The present invention addresses the problem of computing the inverse of large matrices under strict real-time and hardware constraints, where conventional exact inversion (e.g., LU/Cholesky) is computationally expensive and iterative solvers often exhibit unpredictable latency. While approximate inversion methods (including Neumann/polynomial approximations and preconditioning-based schemes) have been studied, they typically do not provide a dimension-agnostic, recursively schedulable, hardware-centric inversion module. This invention introduces a Recursive Block-Diagonal-Dominant Neumann Inversion system and method that decomposes S_n=A+B (invertible block dominant A, residual coupling B), recursively reduces blocks to small sizes for efficient closed-form base inversion, and applies recursive Neumann refinement with residual termination to achieve the required accuracy without redundant computation. The present system and method provide a novel integrated structured decomposition, recursive control, and hardware-mappable refinement. It delivers a deterministic pipelined/parallel architecture for arbitrary dimensions and enables low-latency, low-complexity matrix inversion on FPGA/ASIC/SoC platforms for estimation and filtering pipelines.
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