MUMBAI, India, July 13 -- Intellectual Property India has published a patent application (202641082954 A) filed by Dr. Manjith B. C.; and Ms. Faseela M. H. on July 06, 2026, for Machine-Learning-Assisted Hardware Security System For Hardware- Enforced Cryptographic Authorization And Method Thereof.
Inventors include Dr. Manjith B. C.; and Ms. Faseela M. H..
The application for the patent was published on July 10, 2026, under issue no. 28/2026.
Abstract: The present disclosure relates to a Machine-Learning-Assisted Hardware Security Module (ML-HSM) (100) and a hardware- implemented method for runtime hardware-enforced cryptographic authorization in programmable hardware platforms. The ML-HSM (100) comprises a Secure Boot Verification Circuit (102), a Runtime Behavioral Monitoring Module (104), a Behavioral Feature Extraction Module (106), a Machine-Learning Trust Evaluation Engine (108), a Key Management and Authorization Module (110), a Hardware Authorization Engine (112), a Cryptographic Processing Engine (114), a Ciphertext Gate Enforcement Circuit (116), a Hardware Audit Logger (118), and an HSM Finite State Machine Authorization Controller (142). Runtime system-call activity is processed to generate behavioral feature vectors for machine-learning detection of legitimate software execution, malware, botnet activity, and anomalous runtime behavior. The resulting trust status governs hardware authorization for cryptographic key activation, cryptographic processing, and ciphertext release. The architecture extends the hardware root of trust beyond secure boot through FPGA-based hardware-enforced runtime authorization and audit logging for UAVs and other embedded platforms.
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