MUMBAI, India, Aug. 17 -- Intellectual Property India has published a patent application (202611080369 A) filed by Noida Institute Of Engineering And Technology Niet on June 30, 2026, for Reconfigurable Co-Processing System With Bias-Compensated Estimator For Afdm-Based Integrated Sensing And Communication.
Inventors include Neha; and Dr. Niraj Agrawal.
The application for the patent was published on August 14, 2026, under issue no. 33/2026.
Abstract: The present invention discloses a reconfigurable hardware-software co-processing system (100) for parameter estimation in affine frequency division multiplexing based integrated sensing and communication. The system (100) comprises a reconfigurable discrete affine Fourier transform processor (130) coupled with an adaptive pilot configuration controller (140) that dynamically tunes pilot length and pilot-to-data power according to a measured signal-to-noise ratio. A sequential multi-target estimator (150) co-operates with a hardware bias compensation module (156) and a closed-loop feedback controller (160) maintaining a pseudo-true parameter database (162) in on-chip memory to mitigate residual estimation bias. The system (100) integrates a sensing output processor (170) and a communication decoder (180) sharing a common compute path, enabling a unified testbed (190) with mean square error approaching the theoretical lower bound and approximately forty per cent power reduction.
Disclaimer: Curated by HT Syndication.
