MUMBAI, India, July 13 -- Intellectual Property India has published a patent application (202641083591 A) filed by National Institute Of Technology Karnataka, Surathkal on July 07, 2026, for Self-Timed Asynchronous Circular First-In-First-Out Buffer System For Globally Asynchronous Locally Synchronous System.
Inventors include Rao, Rathnamala; M. N. , Saranya; and Avinash, Chiknis Tapan.
The application for the patent was published on July 10, 2026, under issue no. 28/2026.
Abstract: A self-timed asynchronous circular First-In-First-Out (FIFO) buffer system (106) for a Globally Asynchronous Locally Synchronous (GALS) system (100) includes storage stages (302, 304, 306, 308) arranged in a circular configuration to store input data. A write controller (210) enables storage of input data in a selected storage stage based on a data-indicative signal corresponding to valid input data presence and maintains a write position. A read controller (212) enables retrieval of stored data based on a read request and maintains a read position. A detection circuit (214) generates an acknowledgement signal based on completion of storage and retrieval. A full-and-empty flag generator (216) detects buffer full and empty conditions. The write and read controllers advance respective positions based on acknowledgement signals in a self-timed manner. The selected storage stage transitions to a spacer state during a precharge phase enabling subsequent storage.
Disclaimer: Curated by HT Syndication.
