MUMBAI, India, July 30 -- Intellectual Property India has published a patent application (202641089039 A) filed by Easwari Engineering College; and Srm Institute Of Science And Technology,ramapuram Campus on July 22, 2026, for Single-Pipeline Fpga Architecture For Intelligent Object Detection.
Inventors include Ramakrishnan K; Sanjay Kumar S; Sam Antony S; and Dr. B. Kaleeswari.
The application for the patent was published on July 24, 2026, under issue no. 30/2026.
Abstract: Single-Pipeline FPGA Architecture for Intelligent Object Detection ABSTRACT OF THE INVENTION The present invention relates to a real-time object detection system employing a single-pipeline FPGA acceleration architecture on an embedded System-on-Chip (SoC) platform. The system comprises a video acquisition module, an ARM-based processing system, an FPGA-based programmable logic module, an AXI communication interface, and a deep learning object detection engine. Video frames are preprocessed by the processing system and transferred to the FPGA for hardware-accelerated feature extraction using convolution, activation, and pooling operations. The extracted features are processed by object detection algorithms such as YOLO or MobileNet-SSD to identify and classify objects in real time. The proposed architecture minimizes processing latency, optimizes on-chip memory utilization, reduces power consumption, and improves computational throughput. The system further employs hardware-software co-design, AXI Direct Memory Access (DMA), Block RAM (BRAM), DSP slices, and parallel processing elements to enhance hardware efficiency and enable reliable real-time performance. The invention is suitable for autonomous vehicles, intelligent surveillance, robotics, industrial automation, and edge artificial intelligence applications. Total Number of Words in Abstract:147
Disclaimer: Curated by HT Syndication.
