MUMBAI, India, Aug. 17 -- Intellectual Property India has published a patent application (202641096634 A) filed by Vellore Institute Of Technology on August 10, 2026, for System And Method For Hardware-Enforced Cryptographic Lineage Attestation And Real Time Memory Boundary Enforcement In Streaming Ai Data Pipelines.
Inventors include Jagadeesh; and Shabreena.
The application for the patent was published on August 14, 2026, under issue no. 33/2026.
Abstract: The present invention discloses a hardware-enforced streaming data provenance system for securing artificial intelligence (AI) and machine learning (ML) data processing pipelines against data poisoning attacks. The system comprises a Data Ingestion & Genesis Layer (101), an Intermediate Streaming Transformation Layer (102), and a Pre-Training Accelerator Memory Boundary Layer (103). A hardware Root-of-Trust generates a genesis attestation token for each incoming data micro- batch, while successive transformation nodes append cryptographically signed Merkle Directed Acyclic Graph (Merkle-DAG) lineage tokens containing input-output hashes and hardware execution measurements. A hardware interface controller positioned upstream of accelerator memory verifies the accumulated lineage, hardware attestation, and replay protection parameters before permitting Direct Memory Access (DMA) transfers. Upon detection of invalid lineage or compromised hardware execution states, the controller initiates hardware-level memory protection actions to block poisoned data from entering accelerator memory, thereby ensuring secure, real-time AI model training and inference with minimal latency overhead.
Disclaimer: Curated by HT Syndication.
