MUMBAI, India, July 24 -- Intellectual Property India has published a patent application (202611066868 A) filed by Haridwar University on May 27, 2026, for System And Method For Real-Time Power Quality Disturbance And Cyber- Intrusion Detection In High-Voltage Smart Grids.
Inventor includes Dr. Aadesh K Arya.
The application for the patent was published on July 17, 2026, under issue no. 29/2026.
Abstract: A cyber-physical protection system (100) for a high-voltage smart grid (200) is disclosed. The system (100) comprises a measurement acquisition module (110) coupled to current transformers (201), voltage transformers (202), and phasor measurement units (203); a multiscale signal decomposition module (120) implementing a non-subsampled contourlet transform engine (121), a split augmented Lagrangian shrinkage optimizer (122), and a morphological component analysis separator (123) to separate signals into a physical disturbance subspace and a cyber-induced anomaly subspace; a dual classification module (130) assigning the subspaces to power quality disturbance classes and cyber-attack classes; and a control actuation module (140) issuing differentiated commands to reactive compensation devices (204, 205), grid-forming inverters (206), and communication ports (207). A field-programmable gate array implementation provides a deterministic end-to-end response latency of 10 ms or less. Ref.
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