MUMBAI, India, Aug. 10 -- Intellectual Property India has published a patent application (202641089217 A) filed by Indian Institute Of Technology Madras Iit Madras on July 22, 2026, for Vector Processing Unit And Method For Performing Vector Computation Using The Vector Processing Unit.
Inventors include Veezhinathan, Kamakoti; and Kumar, Hemant.
The application for the patent was published on July 31, 2026, under issue no. 31/2026.
Abstract: Disclosed herein is a vector processing unit (200), and a method (1200) for selectively processing vector data using a configurable plurality of processing element banks and a vector-addressable memory. An instruction decoder decodes vector instructions including an operation code and bank-selection parameters defining a contiguous subset of processing element banks. Control logic generates selection signals that configure a write filter to enable write-back only from the selected banks while suppressing writes from remaining banks, thereby supporting partial vector updates without modifying inactive memory locations. The vector processing unit supports unary, binary, reduction, and expansion operations. A signed stride-based addressing mechanism enables forward, reverse, sparse, and broadcast access patterns, while a windowed addressing scheme facilitates efficient multi-dimensional tensor traversal. The disclosed architecture reduces instruction overhead, improves hardware utilization, and provides a scalable and flexible vector processing solution suitable for machine learning, and other parallel computing applications. FIG. 1
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